Unlike other event handlers, interrupt handlers are expected to set interrupt flags to appropriate values as part of their core functionality. See more

In a low-level microcontroller, the chip might lack protection modes and have no memory management unit (MMU). In these chips, the execution context of an interrupt handler will be essentially the same as the interrupted program, which typically runs on a … See more

In several operating systems‍—‌Linux, Unix, macOS, Microsoft Windows, z/OS, DESQview and some other operating systems used in the past‍—‌interrupt handlers are divided into two parts: the First-Level Interrupt Handler (FLIH) and the Second-Level … See more

In a modern operating system, upon entry the execution context of a hardware interrupt handler is subtle.
For reasons of performance, the handler will typically be initiated in the memory and execution context of the running process, to which it has no … See more

For many reasons, it is highly desired that the interrupt handler execute as briefly as possible, and it is highly discouraged (or forbidden) for a hardware interrupt to invoke potentially blocking system calls. In a system with multiple execution cores, considerations of See more

• Interrupt vector table
• Advanced Programmable Interrupt Controller (APIC)
• Inter-processor interrupt (IPI)
• Interrupt latency See more